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This extracts the conversion of expressions into synthesis-time constants into a new method.

@kroening kroening force-pushed the synthesis-constant branch from 422433c to 7a0bb1f Compare August 14, 2024 17:03
@kroening kroening changed the title Verilog: extract verilog_synthesist::synthesis_constant Verilog: extract verilog_synthesist::synthesis_constant Aug 14, 2024
This extracts the conversion of expressions into synthesis-time constants
into a new method.
@kroening kroening force-pushed the synthesis-constant branch from 7a0bb1f to 7ee52ad Compare August 14, 2024 17:13
@kroening kroening marked this pull request as ready for review August 14, 2024 17:15
@tautschnig tautschnig merged commit dc3a36b into main Aug 14, 2024
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@tautschnig tautschnig deleted the synthesis-constant branch August 14, 2024 17:31
Romy15200 pushed a commit to Romy15200/nws that referenced this pull request Aug 19, 2025
Verilog: extract `verilog_synthesist::synthesis_constant`
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2 participants